- Obtain a basic knowledge of various surface conditioning and cleaning technologies used in the manufacture of ICs.
- Learn about the processes and equipment used for wet, plasma, and dry cleaning.
- Receive an overview and comparison of established surface conditioning and cleaning techniques and new technologies. In addition, this course will introduce new technologies such as supercritical fluid processing that may be used for future clean requirement.
- Find out information on specific surface conditioning techniques including critical cleaning, photoresist stripping, and post-CMP cleaning. Discuss techniques such as megasonics, dilute chemistries, and the use of ozone.
- Understand of how the cleans affects low-k dielectrics and copper. Includes cleaning challenges for new materials.
This two-day course provides a working knowledge of surface conditioning and cleaning techniques used in the manufacture of integrated circuits (IC). Fundamentals of the techniques used for cleaning the wafer surface will be discussed. Practical applications and methods for cleaning will be presented
Upon completing this course participants will have an understanding of all types of cleaning processes used in IC manufacturing; surface conditioning for pre-diffusion clean, in particular pre-gate oxide clean, post-etch and post-implant photoresist removal, particle removal, post-CMP clean. Participants will be able to understand the cleaning roadmaps and limitations of clean technologies as the node sizes decrease and should be able to make informed decisions on the surface conditioning and cleaning processes and techniques to utilize for IC manufacturing.
Who Should Attend?
The intended audience is any engineer or manager associated with using or supplying clean and contamination free technologies for IC manufacturing. In particular semiconductor manufacturing process engineers, process development engineers, and integration engineers, IC equipment application and process engineers, and IC clean chemical process engineers are the target audience.
Course Notes and Handbook of Semiconductor Wafer Cleaning Technology, ed., Werner Kern, Noyce Publications, New York. 1993
Karen A. Reinhardt is Principle Consultant at Cameo Consulting in San Jose, California. Prior to forming a consulting company, Karen was employed at Novellus Systems in San Jose, California. In this role she was responsible for investigating and assessing new and unique cleaning technologies that will allow realization of the ITRS roadmap with respect to smaller geometries, new materials, and the environmental issues associated with current cleaning processes. She has published more than 30 technical papers ranging from plasma processing to damage characterization and cleaning technology assessment. She has been awarded six patents. She is currently leading the ITRS surface preparation technical working group.
Robert Small is currently the Technology Consultant for RS Associates. He previously held the positions of CMP Technical Director and also was the R&D Technical Director for the remover line of business at DuPont/EKC Technology. He was involved in developing new chemistries for post-CMP cleaning, CMP chemistries, and post-etch residue removal. He has a B.S. from Norwich University, an M.S. from Texas Tech University, and a Ph.D. in organic photochemistry from the University of Arizona. He holds more than twenty-five U.S. and foreign patents and currently has ten submitted U.S. patent applications. He has authored or co-authored more than 115 articles and presentations, including BEOL, post clean treatment, post CMP, and CMP processes.