Fabrication of Planar Silicon CMOS Integrated Circuits

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Date:

8:30am-12:00pm, Tuesday, May 19, 2020, Sheraton Albuquerque Airport Hotel, Albuquerque, NM

Course Objectives

  • Provide a brief introduction to atomic structure, materials, and device physics to help students understand what we build and why we build it the way we do. Topics will include the P-N junction, FETs, and MOSFETs, all leading to CMOS.
  • Step through a planar CMOS fabrication flow, with discussion of functional modules and with clear differentiation of front end of line and back end of line processing.
  • Discuss at a high level many of the process technologies used for fabrication.

Course Description

In this half-day course we will cover the fabrication of planar silicon complementary metal oxide semiconductor (CMOS) integrated circuits. The course will start with introductory device physics (from the atom to CMOS in about 20 slides) and then progress into how integrated circuits are manufactured. This will include an overview of the structure and function of the physical elements of a model CMOS technology as well as high level descriptions of the process technologies used during fabrication.

Who Should Attend?

Staff, technologists, students, project managers, administrators – anyone with an interest in understanding how integrated circuits are manufactured.

Instructor: Todd Bauer, Sandia National Laboratories

Todd Bauer is a staff member in the fab operations group at Sandia National Laboratories, where for 18 years he has supported process integration for production and R&D, for a wide variety of microsystems technologies including silicon CMOS.

Prior to working at Sandia, Todd completed his Ph.D. in chemical engineering at the University of New Mexico.

Course Materials

Course Notes.

Cost: $345.00
Full time university student: $25

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